| 摘要 |
PROBLEM TO BE SOLVED: To provide a pulse generating circuit for surely outputting an AFC2 pulse signal even when a phase of an AFC2 pulse signal is set earlier than that of the AFC1 pulse signal. SOLUTION: The pulse generating circuit is provided with a dissidence detection circuit 3 for detecting a setting change in a phase difference, and an AFC1 pulse counter 4 for outputting a count used for generating the AFC1 pulse signal. An AFC2 pulse generating circuit 5 generates the AFC2 pulse signal with a desired phase difference to the AFC1 pulse signal on the basis of a detection result of the dissidence detection circuit 3 and the count of the AFC1 pulse counter 4. COPYRIGHT: (C)2005,JPO&NCIPI |
