CLOCK GENERATION CIRCUIT, SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND CLOCK GENERATION METHOD

摘要

PROBLEM TO BE SOLVED: To provide a synchronous mirror delay circuit and a semiconductor integrated circuit device including the same.

SOLUTION: The clock generation circuit for generating an internal clock signal with which an external clock signal is synchronized, is disclosed. A clock buffer circuit generates a reference clock signal in response to the external clock signal, and a delay monitor circuit delays the reference clock signal. A forward delay array sequentially delays forwards output clock signals from the delay monitor circuit and generates a delayed clock signal. The delayed clock signal and the reference clock signal are inputted to a mirror control circuit, and one of delayed clock signals synchronized with the reference clock signal is detected. A backward delay array delays backwards the delayed clock signal detected by the mirror control circuit and outputs a synchronizing clock signal. A delay circuit delays an asynchronous clock signal outputted through the forward delay array. When the reference clock signal is not synchronized with one of delayed clock signals, a clock driving circuit outputs the delayed asynchronous clock signal as the internal clock signal.

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