Pipeline processing method for implementation of jump commands in which to speed processing jump command addresses and control information are stored in a special jump memory

摘要

Method for accelerated implementation of a jump command that is carried out by a microprocessor using pipeline processing, whereby: if a jump command is present in a write stage (5) a jump memory (6) is interrogated and control information produced via a decoding stage (2, 3). If an entry is found in the jump memory the control information is simultaneously transmitted to a pipeline loading stage. If the entry is not found in the jump memory then jump address and control information for this command are stored in memory after execution of the jump command.