发明名称 MULTILAYER INTERCONNECTION BOARD AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To obtain a multilayer interconnection board for preventing fail from occurring in the insulation between wiring circuit layers, when a flaw on a board surface by blast treatment or the like causes the infiltration of water in plating treatment and a high humidity atmosphere in the multilayer interconnection board incorporating an insulating layer whose thickness is 70μm or thinner at least inside. SOLUTION: In a ceramic multilayer interconnection board 1, the wiring circuit layer 3 is formed on the surface and inside of an insulating board 2, where a plurality of insulating layers 2a-2i including the thin insulating layer of at least 70μm or thinner are laminated. In this case, the thickness of the insulating layers 2a, 2i at an outermost surface side where the surface wiring circuit layer 3 is formed is set to 75μm or thicker. Especially, a plating layer 6 whose thickness is 1-20μm is formed in the surface wiring circuit layer 3. Furthermore, the multilayer interconnection board is ideal when a sheet hard to be sintered is laminated on the surface of a forming body for burning before the sheet hard to be sintered is removed for manufacturing a wiring board having high precision in dimensions. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2004281794(A) 申请公布日期 2004.10.07
申请号 JP20030072343 申请日期 2003.03.17
申请人 KYOCERA CORP 发明人 SHIGEOKA TOSHIAKI;KIMURA TETSUYA;TAMI YASUHIDE;HAMANO SATOSHI
分类号 H05K1/09;H05K3/46;(IPC1-7):H05K3/46 主分类号 H05K1/09
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