发明名称 |
[SPLIT GATE FLASH MEMORY CELL AND MANUFACUTIRNG METHOD THEREOF] |
摘要 |
A split gate flash memory cell includes a substrate having a trench, a stack structure disposed on the substrate, wherein the stack structure includes a tunneling dielectric layer, a floating gate and a cap layer; a first inter-gate dielectric layer and a second inter-gate dielectric layer disposed on the sidewalls of the stack structure, wherein the first inter-gate dielectric layer is contiguous to the top of the trench; a selective gate disposed on the sidwalls of the first inter-gate dielectric layer and the trench; a selective gate dielectric layer disposed between the selective gate and the substrate; a source region configured in the substrate beside the side of the stack structure with the second inter-gate dielectric layer; and a drain region configured at the bottom of the trench beside one side of the selective gate.
|
申请公布号 |
US2004197999(A1) |
申请公布日期 |
2004.10.07 |
申请号 |
US20040709309 |
申请日期 |
2004.04.28 |
申请人 |
CHANG KO-HSING;HSU HANN-JYE |
发明人 |
CHANG KO-HSING;HSU HANN-JYE |
分类号 |
H01L21/8247;H01L29/423;H01L29/788;(IPC1-7):H01L21/76 |
主分类号 |
H01L21/8247 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|