发明名称 Expandable slave device system
摘要 A bus system for use with addressable memory has a global bus of bidirectional signal lines. The global bus has a first end and a second end. A master device transmits data to and receives data from the global bus at the first end. A global bus terminator is coupled to the global bus at the second end. One or more slave devices, including a last slave device at a furthest distance from the master device, each includes an active terminator coupled to at least some of the bidirectional signal lines of the global bus. The active terminator of only the last slave device is enabled.
申请公布号 US2004196064(A1) 申请公布日期 2004.10.07
申请号 US20030738293 申请日期 2003.12.16
申请人 发明人 GARLEPP BRUNO W.;BARTH RICHARD M.;DONNELLY KEVIN S.;TSERN ELY K.;HAMPEL CRAIG E.;MITCHELL JEFFREY D.;GASBARRO JAMES A.;GARRETT BILLY W.;WARE FREDRICK A.;PERINO DONALD V.
分类号 G06F13/40;G06F13/42;(IPC1-7):H03K17/16 主分类号 G06F13/40
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