发明名称 |
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE TO REDUCE PARASITIC CAPACITANCE |
摘要 |
PURPOSE: A method for manufacturing a semiconductor device is provided to reduce parasitic capacitance by forming a space with low-permittivity between a sidewall spacer and an oxide pattern. CONSTITUTION: Conductive lines(110) with a sidewall spacer(120) are formed on a semiconductor substrate(100). An oxide pattern is formed between the conductive lines in order to a desired space(170) between the sidewall spacer and the oxide pattern. An HDP(High Density Plasma) oxide layer(160) is formed on the resultant structure without filling the space. A contact hole is formed to expose the substrate. A contact plug(180) is then filled in the contact hole.
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申请公布号 |
KR20040084224(A) |
申请公布日期 |
2004.10.06 |
申请号 |
KR20030019133 |
申请日期 |
2003.03.27 |
申请人 |
HYNIX SEMICONDUCTOR INC. |
发明人 |
LEE, SANG WAN |
分类号 |
H01L21/28;(IPC1-7):H01L21/28 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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