发明名称 Phase locked loop that avoids false locking
摘要 A phase locked loop includes a difference detector, a loop filter, a controlled oscillation module, and a frequency translation module. The difference detector is operably coupled to determine a difference signal based on phase and/or frequency differences between a feedback oscillation and a reference oscillation. The loop filter is operably coupled to generate a control signal from the difference signal. The controlled oscillation module is operably coupled to produce, in accordance with an adjustable operating parameter, an output oscillation based on the controlled signal. The adjustable operating parameter is set based on desired operating conditions of the phase locked loop such that false locking of the phase locked loop is substantially avoided. The frequency translation module is operably coupled to produce the feedback oscillation from the output oscillation based on a frequency translation rate.
申请公布号 US6801092(B1) 申请公布日期 2004.10.05
申请号 US20030409213 申请日期 2003.04.08
申请人 BROADCOM CORP. 发明人 MOLOUDI SHERVIN
分类号 H03C3/09;H03L7/089;H03L7/099;H03L7/10;(IPC1-7):H03L7/00 主分类号 H03C3/09
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