发明名称 |
Overlay mark, method of measuring overlay accuracy, method of making alignment and semiconductor device therewith |
摘要 |
The present invention relates to an overlay mark used for the measurement of the overlay accuracy between layered patterns and alignment at the time of exposure; which has a grooved pattern surrounding a mark pattern that is formed by engraving a groove or an indent in a prescribed position on a layer where a circuit pattern is formed so as to protect this mark pattern from being deformed by thermal expansion or contraction of this layer. The present invention enables to form a multi-layered circuit pattern with a high accuracy and a high yield in production, even in the formation of a minute and densely-spaced circuit pattern.
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申请公布号 |
US6801313(B1) |
申请公布日期 |
2004.10.05 |
申请号 |
US20000627456 |
申请日期 |
2000.07.27 |
申请人 |
NEC ELECTRONICS CORPORATION |
发明人 |
YOKOTA KAZUKI |
分类号 |
H01L21/027;G01B11/03;G03F7/20;G03F9/00;H01L21/66;H01L23/544;(IPC1-7):G01B11/00;G01B11/14;G03C5/00;H01L21/476 |
主分类号 |
H01L21/027 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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