发明名称 |
MOS device and process for manufacturing MOS devices using dual-polysilicon layer technology |
摘要 |
An MOS device has a stack and a passivation layer covering the stack. The stack is formed by a first polysilicon region and by a second polysilicon region arranged on top of one another and separated by an intermediate dielectric region. An electrical connection region, formed by a column structure substantially free of steps, extends through the passivation layer, the second polysilicon region and the intermediate dielectric region, and terminates in contact with the first polysilicon region so as to electrically contacting the first polysilicon region and the second polysilicon region. Fabrication of the electrical connection region requires just one mask. |
申请公布号 |
US2004188759(A1) |
申请公布日期 |
2004.09.30 |
申请号 |
US20030745295 |
申请日期 |
2003.12.23 |
申请人 |
STMICROELECTRONICS S.R.L. |
发明人 |
CONTIN VALENTINA TESSA;CAIMI CARLO;MERLANI DAVIDE;CAPRARA PAOLO |
分类号 |
H01L21/8247;H01L27/105;H01L27/115;H01L29/423;H01L29/76;(IPC1-7):H01L29/76 |
主分类号 |
H01L21/8247 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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