| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a debugger capable of transferring and executing an execution memory with optional assignment at the time of execution. <P>SOLUTION: This system comprises a parallel data conversion part 3 for converting execution address serial information from an ICE device 110 to execution address parallel information, a PC trace conversion part 3 for converting the execution address parallel information to execution address trace information based on memory image reference information, a branch information formation part 5 for forming section branch information based on the memory image reference information and source reference information, and a section information addition part 6 for forming execution address information with section information based on the execution address trace information, the section branch information and the source reference information. This system further comprises source line trace information connection part 7 for forming trace information with source line based on the source reference information, the execution address trace information with section information. <P>COPYRIGHT: (C)2004,JPO&NCIPI |
