发明名称 A/D CONVERSION CIRCUIT AND D/A CONVERSION CIRCUIT UTILIZING CAPACITIVE COUPLING
摘要 PROBLEM TO BE SOLVED: To provide a logic circuit, an analog/digital (A/D) conversion circuit and the like with a small number of elements by utilizing a capacitive coupling circuit. SOLUTION: In the A/D conversion circuit including an input terminal to which an analog input is imparted, and an N-bits (N is a multiple number) output terminal to which a binary output is imparted, N unit circuits each including an input capacitor of which the one electrode is connected to the input terminal, a first inverter wherein the other electrode of the input capacitor is inputted, and a second inverter connected to the first inverter, are parallel provided. Outputs of the second inverters in these unit circuits are then imparted to the output terminals, and further, an inverted output of the output corresponding to each unit circuit is fed back to the input of the first inverter in the unit circuit corresponding to a low-order bit via a feedback capacitor, and a capacitive value of the feedback capacitor corresponding to the inverted output of an M-th (M is an integer) unit circuit from a most significant bit is 1/2M-fold input capacity of the unit circuit to which the output is fed back. COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP2004274799(A) 申请公布日期 2004.09.30
申请号 JP20040196203 申请日期 2004.07.02
申请人 FUJITSU LTD 发明人 MIYAMOTO YOSHIHIRO
分类号 H03M1/44;H03K5/08;H03M1/74;(IPC1-7):H03M1/44 主分类号 H03M1/44
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