发明名称 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a plating method capable of preventing the generation of cost increase due to the increase of CMP polishing time, dishing and errosion, etc., by causing protuberance of the plating at the place where the wiring is dense in the damascene method copper plating. SOLUTION: The copper plating is performed so that a current step has a step where current is made to flow only at the opposite direction to the plating growth direction by only one step as shown in figure. At this time, the opposite direction current step is performed by one step at the condition where current×time is within 1.0-120 mA×sec/cm<SP>2</SP>. COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP2004270028(A) 申请公布日期 2004.09.30
申请号 JP20030432532 申请日期 2003.12.26
申请人 NEC ELECTRONICS CORP 发明人 ARITA KOJI;MIKAGI IKU;KITAO RYOHEI
分类号 C25D7/12;H01L21/288;H01L21/3205;H01L21/768;(IPC1-7):C25D7/12;H01L21/320 主分类号 C25D7/12
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