发明名称 Low stress flip-chip package for low-K silicon technology
摘要 An underfill includes a base material and a filler material added to the base material wherein the filler material constitutes a selected percentage by weight of the underfill to provide an optimum balance between interfacial die stress and solder bump strain for next generation, Cu, low-K silicon technology.
申请公布号 US2004188862(A1) 申请公布日期 2004.09.30
申请号 US20030396955 申请日期 2003.03.24
申请人 NAGARAJAN KUMAR;KUTLU ZAFER 发明人 NAGARAJAN KUMAR;KUTLU ZAFER
分类号 H01L21/56;H01L23/29;(IPC1-7):H01L23/28 主分类号 H01L21/56
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