发明名称 |
PREDRIVER CIRCUIT, CAPACITIVE LOAD DRIVE CIRCUIT, AND PLASMA DISPLAY |
摘要 |
PROBLEM TO BE SOLVED: To provide a predriver circuit which reduces a time lag between a high-level output voltage and a low-level output voltage. SOLUTION: The circuit comprises input amplifier circuits 41 and 44 for amplifying input voltages IN1 and IN2 having been inputted to input voltage terminals 33 and 34, high-level shift circuits 42 and 45 for shifting signal levels outputted by the input amplifier circuits, and a plurality of driving systems having output amplifier circuits 43 and 46 for amplifying shift signals outputted by the high-level shift circuits. The driving systems are identical to one another in configuration. COPYRIGHT: (C)2004,JPO&NCIPI
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申请公布号 |
JP2004274719(A) |
申请公布日期 |
2004.09.30 |
申请号 |
JP20030427980 |
申请日期 |
2003.12.24 |
申请人 |
FUJITSU HITACHI PLASMA DISPLAY LTD |
发明人 |
ONOZAWA MAKOTO;OKADA YOSHINORI;OKI HIDEAKI;TAIRA MASATOSHI;KOIZUMI HARUO |
分类号 |
H03K17/16;G09G3/28;G09G3/288;H03K17/687;(IPC1-7):H03K17/16 |
主分类号 |
H03K17/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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