| 摘要 |
A METHOD IS PROVIDED FOR FORMING SILICIDE (56) SURFACES ON SOURCE, DRAIN, AND GATE ELECTRODES (44, 46, 52) IN ACTIVE DEVICES TO DECREASE THE RESISTANCE OF THE ELECTRODE SURFACES, WITHOUT CONSUMING THE SILICON OF THE ELECTRODES IN THE PROCESS. SILICIDE (56) IS DIRECTIONALLY DEPOSITED ON THE ELECTRODES SO THAT A GREATER THICKNESS (60) ACCUMULATES ON ELECTRODE SURFACES, AND A LESSER THICKNESS (62) ACCUMULATES ON THE GATE SIDEWALL SURFACES (54) ISOLATING THE GATE FROM THE SOURCE/DRAIN ELECTRODES. THEN, THE ELECTRODES ARE ISOTROPICALLY ETCHED SO THAT THE LESSER THICKNESS (62) ON THE SIDEWALLS IN REMOVED, LEAVING AT LEAST SOME THICKNESS OF SILICIDE COVERING THE ELECTRODES. IN FURTHER STEPS, THE ELECTRODES ARE MASKED WITH PHOTORESIST (82), AND ANY SILICIDE DEPOSITED IN THE REGION OF FIELD OXIDE AROUND THE ELECTRODES IS REMOVED. CONDUCTIVE LINES, CONNECTING TO THE ELECTRODES ACROSS THE FIELD OXIDE, ARE FABRICATED FROM POLYCIDE, WHICH INCLUDES A LEVEL OF POLYSILICON COVERED WITH SILICIDE, WHEN THE LOWER RESISTANCE SURFACE OF A METAL-DISILICIDE OVERLYING THE CONDUCTIVE LINE IS REQUIRED. THE METHOD OF THE PRESENT INVENTION IS APPLICABLE TO BULK SILICON, AS WELL AS SIMOX, TRANSISTOR FABRICATION PROCESSES. AN IC STRUCTURE HAVING DIFFERENT THICKNESSES OF DIRECTION ALLY DEPOSITED SILICIDE, AND A COMPLETE MOS TRANSISTOR HAVING INTERIM THICKNESSES OF DIRECTIONALLY DEPOSITED SILICIDE, ARE ALSO PROVIDED. (FIG.5&6) |
