发明名称 MULTI-INPUT CMOS GATE CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To realize a multi-input OR gate circuit which attains a high speed operation. <P>SOLUTION: Corresponding pairs of transistor gates of a parallel PMOS transistor group 11 and a parallel NMOS transistor group 12 are respectively connected to input terminals IN1-INx. When the input terminals IN1-INx are all "H", a transistor MPO is turned on and a transistor MNO1 is turned off. When the input terminals are all "L", the transistor MPO is turned off and transistors MNO1, MNO2 are turned on. When any one or more onput terminals are "H" and the remaining input terminals are "L", the transistors MPO, MNO2 are turned on and the transistor MNO1 is turned off. <P>COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP2004274611(A) 申请公布日期 2004.09.30
申请号 JP20030065539 申请日期 2003.03.11
申请人 NEW JAPAN RADIO CO LTD 发明人 FUKUDA HIDEKI
分类号 H03K17/04;H03K17/687;H03K19/0948 主分类号 H03K17/04
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