发明名称 FREQUENCY AND PHASE CONTROL APPARATUS AND MAXIMUM LIKELIHOOD DECODER
摘要 A frequency and phase control apparatus (100) includes an analog/digital conversion section (62) for converting a reproduction signal into a multiple bit digital (64) signal based on a clock signal (63); a maximum likelihood decoding section (4) for converting the multiple bit digital signal into a binary signal (66); a pattern detection section (50) for detecting a pattern of the binary signal; and a determination section (11) for determining whether or not the multiple bit digital signal and the clock signal are in synchronization with each other based on the detection result. When the determination result of the determination section indicates that the multiple bit digital signal and the clock signal are in synchronization with each other, the maximum likelihood decoding section generates a binary signal based on a first state transition rule (fig.12); otherwise, the maximum likelihood decoding section generates a binary signal based on a second state transition rule (fig.13).
申请公布号 WO2004038719(A3) 申请公布日期 2004.09.30
申请号 WO2003JP13400 申请日期 2003.10.20
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.;MIYASHITA, HARUMITSU;NAKAJIMA, TAKESHI;KIMURA, NAOHIRO 发明人 MIYASHITA, HARUMITSU;NAKAJIMA, TAKESHI;KIMURA, NAOHIRO
分类号 G11B20/10;G11B20/14;G11B20/18;G11B27/30;H03L7/091;H03L7/107;H04L7/033;H04L7/04 主分类号 G11B20/10
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