发明名称 |
METHOD OF FORMING HIGH PERFORMANCE CMOS DEVICE WITH REDUCED COST |
摘要 |
PROBLEM TO BE SOLVED: To provide a method of reducing a working cost of a CMOS device by reducing the number of photolithographic masking processes. SOLUTION: The method comprises the steps of: forming an L-shaped silicon oxide spacer configured by a vertical direction part 4b, a thick horizontal part 4b, and a thin horizontal part 4c at a side of a gate structure 3; forming a shield 6 in a PMOS region 40 of the CMOS device and then forming a P-type halo region 7 at the top of an NMOS region 30 by carrying out an injection treatment; forming an N-type LDD region 8 under the thick horizontal spacer part; forming a heavily doped deep N-type source / drain region 9 under a thin horizontal spacer part; forming a photoresist 15 on a specific CMOS region and then forming a composite insulator spacer 14b at a side of the gate structure which is not coated with the photoresist 15; and subsequently forming a metal silicide 16 on the gate structure 3 and the source / drain region 9. COPYRIGHT: (C)2004,JPO&NCIPI
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申请公布号 |
JP2004274022(A) |
申请公布日期 |
2004.09.30 |
申请号 |
JP20030342753 |
申请日期 |
2003.10.01 |
申请人 |
CHARTERED SEMICONDUCTOR MFG LTD |
发明人 |
ZHENG JIA ZHEN;SIAH SOH YUN;HSIA LIANG CHOO;LIM ENG HUA;CHOOI SIMON;ANG CHEW HOE |
分类号 |
H01L21/28;H01L21/266;H01L21/336;H01L21/8238;H01L27/092;H01L29/78;(IPC1-7):H01L21/823 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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