发明名称 Clock controlling method and apparatus
摘要 A clock controller 102 controls a clock generated by a clock generator 101 to determine a clock frequency. A computing device 103 executes a software obtained from a storage 104 in accordance with the clock supplied via the clock controller 102. An exclusive processing section detector 110 detects the start and end of an exclusive processing section which is a section during which an exclusive processing is executed. A clock control judging device 111 commands the clock controller 102 to decrease the clock frequency if the exclusive processing section detector 110 has detected the start of a specific processing section, while commanding the clock controller 102 to decrease the clock frequency if the exclusive processing section detector 110 has detected the end of the specific processing section.
申请公布号 EP1462915(A2) 申请公布日期 2004.09.29
申请号 EP20040007243 申请日期 2004.03.25
申请人 PANASONIC CORPORATION 发明人 KATO, KAZUOMI;MIZUYAMA, MASASHIGE
分类号 G06F1/04;G06F1/32;(IPC1-7):G06F1/32 主分类号 G06F1/04
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