Method of fabricating nano-scale resistance cross-point memory array and device

摘要

A method of fabricating a nano-scale resistance cross-point memory array includes preparing a silicon substrate (60); depositing silicon oxide on the substrate to a predetermined thickness; forming a nano-scale trench in the silicon oxide; depositing a first connection line in the trench; depositing a memory resistor layer (78) in the trench on the first connection line; depositing a second connection line in the trench on the memory resistor layer; and completing the memory array. A cross-point memory array includes a silicon substrate (60); a first connection line (76) formed on the substrate; a colossal magnetoresistive layer (78) formed on the first connection line; a silicon nitride layer (82) formed on a portion of the colossal magnetoresistive layer; and a second connection line formed (86) adjacent the silicon nitride layer and on the colossal magnetoresistive layer. <IMAGE>