发明名称 Methods for forming wordlines, transistor gates, and conductive interconnects
摘要 The invention encompasses stacked semiconductor devices including gate stacks, wordlines, PROMs, conductive interconnecting lines, and methods for forming such structures. In one aspect, the invention includes a method of forming a conductive line comprising: a) forming a polysilicon layer; forming a silicide layer against the polysilicon layer; b) providing a conductivity-enhancing impurity within the silicide layer; and c) providing the polysilicon layer and the silicide layer into a conductive line shape. In another aspect, the invention includes a programmable-read-only-memory device comprising: a) a first dielectric layer over a substrate; b) a floating gate over the first dielectric layer; c) a second dielectric layer over the floating gate; d) a conductive line over the second dielectric layer; and e) a metal-silicide layer over the conductive line, the metal-silicide layer comprising a Group III dopant or a Group V dopant.
申请公布号 US6797601(B2) 申请公布日期 2004.09.28
申请号 US19990332271 申请日期 1999.06.11
申请人 MICRON TECHNOLOGY, INC. 发明人 SCHUEGRAF KLAUS FLORIAN;THAKUR RANDHIR P. S.
分类号 H01L21/28;H01L21/3215;H01L21/768;H01L27/115;(IPC1-7):H01L21/320;H01L21/31;H01L21/44;H01L21/476 主分类号 H01L21/28
代理机构 代理人
主权项
地址