发明名称 System and method for processing power management signals in a peer bus architecture
摘要 A system and method for handling number power management signals, such as PME# signals, is disclosed. The power management signal lines are coupled to general purpose inputs in the south bridge or super I/O. The general purpose input that received the power management signal records the assertion of a power management signal. A logical circuit is employed to logically OR the power management signals to a single dedicated power management signal input so that the computer system will power up if any PCI device asserts a power management signal. The BIOS records the identity of the general purpose that received the power management signal in a memory location associated with that general purpose input or as a virtualized power management signal input. The operating system checks the memory location or virtualized power management signal input to determine which power management signal line transmitted the power management signal. The operating system can then identify the correct PCI bus and search for the PCI device that asserted the power management signal.
申请公布号 US6799278(B2) 申请公布日期 2004.09.28
申请号 US20000742645 申请日期 2000.12.21
申请人 DELL PRODUCTS, L.P. 发明人 KHATRI MUKUND PURSHOTTAM;DUBE SHAWN JOEL
分类号 G06F1/32;G06F11/00;G06F13/42;(IPC1-7):G06F1/26 主分类号 G06F1/32
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