发明名称 Method and system for detecting a hard failure in a memory array
摘要 A method and system for detecting a failure in a dynamic random access memory (DRAM) array having a plurality of cells organized in a matrix fashion of rows and columns. The method includes reading the content of a first row of cells of the memory array during a first refresh cycle. After obtaining the content from the first row of cells, a first complement of the content is generated. The generated first complement is then written back to the first row of cells during the writeback operation of the first refresh cycle. During the subsequent refresh cycle, the first complement in the first row of cells is read and a second complement of the first complement is generated. Next, the original content in the first row of cells is compared with the second complement. In response to the original content not being equal to the second complement, a control signal is generated to indicate a failure in the memory array. In a related embodiment, the second complement is written back to the first row of cells during the subsequent refresh cycle writeback operation to restore the content in the first row of cells to its original value.
申请公布号 US6799291(B1) 申请公布日期 2004.09.28
申请号 US20000716915 申请日期 2000.11.20
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 KILMER CHARLES ARTHUR;SINGH SHANKER
分类号 G11C29/40;(IPC1-7):G11C29/00 主分类号 G11C29/40
代理机构 代理人
主权项
地址