Asymmetric digital subscriber line communication system e.g. receiver, has loop circuit conducting phase locked loop operation for signal with most superior signal to noise ratio characteristic to generate sampling clock signal

摘要

The system has a selector selecting a signal with most superior signal to noise ratio (SNR) characteristic among digital signals. An operation block sets the selected signal to a value based on the selected one of the digital signals. A loop circuit conducts a phase locked loop (PLL) operation for the selected signal to generate a sampling clock signal to be applied to an analog-to-digital converter (101).