| 摘要 |
A semiconductor memory includes a first decoder selecting any of modes 1-n of a test mode B according to first to fourth data signals, and a second decoder selecting any of modes 1-n of the test mode B according to fifth to eighth data signals. When a predetermined mode m+1 is not set in a test mode A, the mode selected by both the first and second decoders is set. When the predetermined mode m+1 is set, the mode selected by the first decoder is set. Therefore, the test mode B can be set at the manufacturer side by connecting only four data input/output terminals to the tester.
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