Packaging for multi-processor shared-memory system

摘要

An electrical structure or package, and associated method of formation. A plurality of logic chips is coupled electrically to a memory chip either through conductive members (e.g., solder balls) that interface with the memory chip and each logic chip, or through a sequential logic-to-memory electrically conductive path that includes: a first conductive member electrically coupled to a logic chip; an electrically conductive via path through a circuitized substrate; and a second conductive member electrically coupled to the memory chip. The logic chips are electrically coupled to the substrate either directly through an interfacing solder interconnection from the logic chip to the substrate, or indirectly through the memory chip such that the memory chip is electrically coupled to the substrate by an interfacing solder interconnect. The electrical structure may be plugged into a socket of a backplane of a circuit card.