| 摘要 |
Method and apparatus for calibrating timing accuracy during testing of integrated circuits. An ATE type (automatic test equipment) integrated circuit tester calibrates itself to reference blocks (dummy ICs) that have the same relevant dimensions as the integrated circuits to be tested and have fit into the test fixture. The number of reference blocks required is equal to the number of signal terminals on the integrated circuit to be tested subject to timing calibration where typically the number of signal terminals is less than the total number of signal terminals on the IC being tested and is typically a relatively small number, e.g., 9. This is useful in the case of high pin count integrated circuits where the pins are grouped into relatively small numbers of pins which are source synchronous. A signal trace electrically connects a different signal terminal to a common reference terminal on each reference block in the set. The reference blocks are then cycled through the tester apparatus as if they were an IC under test, resulting in timing calibration. This allows calibration for critical timing skew requirements for small groups of input/output pins on the IC under test.
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