| 摘要 |
PURPOSE: A microcomputer is provided to detect defect of multiple signal lines such as a word line transferring a signal of a CPU with a low expense. CONSTITUTION: The signal lines(31-33) are prepared by matching with output signals of the CPU(1). A shift register(20) stores setting data matched with the signal lines. For an active state, the first signal transferors(61-66) transfer the output signal of the CPU to the signal lines. For an active state, the second signal transferors(51-56) transfer the setting data of the shift register to the signal lines. A signal transfer controller comprising the signal line(31) and an inverter(50) controls an active/inactive state of the first/second signal transferor. The signal transfer controller changes the first signal transferors to the active state when a mode signal orders a usual state, and changes the second signal transferors to the active state when the mode signal orders a special state.
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