发明名称 HALF BRIDGE TYPE INVERTER CIRCUIT, IN WHICH RS FLIP-FLOP IS PREVENTED FROM MIS-OPERATING ALTHOUGH HIGH LEVEL SIGNAL IS INPUTTED TO SET TERMINAL AND RESET TERMINAL OF FILP-FLOP AT THE SAME TIME
摘要 PURPOSE: A half bridge type inverter circuit is provided to perform a stable operation by preventing the RS flip-flop from mis-operating although the high level signal is inputted to the set terminal and the reset terminal of the flip-flop at the same time. CONSTITUTION: A half bridge type inverter circuit includes a pulse generation circuit(32) and a reset type flip-flop(FF). The reset type flip-flop makes the high side output signal off when the set signal and the reset signal approach high level at the same time.
申请公布号 KR20040080343(A) 申请公布日期 2004.09.18
申请号 KR20040013432 申请日期 2004.02.27
申请人 SANYO ELECTRIC CO., LTD. 发明人 USHIDA ATSUYA
分类号 H02M7/537;H02M1/08;H02M7/5387;H03K19/0185 主分类号 H02M7/537
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