发明名称 |
SEMICONDUCTOR CONSTRUCTIONS WITH GATED ISOLATION REGIONS HAVING INDIUM-DOPED SUB-REGIONS |
摘要 |
The invention includes a semiconductor construction wherein gate structures are separated by isolation regions that are provided with an indium-doped pocket and a covering gate. The invention also includes a semiconductor construction having a pair of channel regions that have sub-regions doped with indium and surrounded by boron. A pair of transistor constructions are located over the channel regions and are separated by an isolation region. The transistors have gates that are wider than the underlying sub-regions. The invention also includes a semiconductor construction that has transistor constructions with insulative spacers along gate sidewalls. Each transistor construction is between a pair source/drain regions that extend beneath the spacers. A source/drain extension extends the source/drain region farther beneath the transistor constructions on only one side of each of the transistor constructions. The invention also includes methods of forming semiconductor constructions. |
申请公布号 |
WO2004019384(A3) |
申请公布日期 |
2004.09.16 |
申请号 |
WO2003US26906 |
申请日期 |
2003.08.25 |
申请人 |
MICRON TECHNOLOGY, INC. |
发明人 |
LUAN, TRAN, C. |
分类号 |
H01L27/08;A44C7/00;H01L21/00;H01L21/28;H01L21/3205;H01L21/336;H01L21/4763;H01L21/82;H01L21/8234;H01L21/8242;H01L21/84;H01L27/088;H01L27/10;H01L27/108;H01L29/10;H01L29/49;H01L29/78;H01L31/062;H01L31/113 |
主分类号 |
H01L27/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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