摘要 |
PROBLEM TO BE SOLVED: To increase the degree of integration of a semiconductor device and, at the same time, to reduce the size of the device by reducing the parasitic capacitance of the device. SOLUTION: A laminate 17 is formed by providing an n<SP>+</SP>-type buried diffused layer 14 and an n<SP>-</SP>-type epitaxial layer 16 on a p<SP>-</SP>-type silicon substrate 12. Then first and second polycrystalline silicon layers 28a and 28b are formed on the epitaxial layer 16 by separating the layers 28b and 28b from each other by a prescribed distance. In addition, p-type impurities are respectively injected into the polycrystalline silicon layers 28a and 28b several times, and an emitter region 36a and a collector region 36b are formed by diffusing prescribed amounts of the p-type impurities injected into the silicon layers 28a and 28b into the epitaxial layer 16 underlying the silicon layers 28a and 28b. Thereafter, first and second electrode layers are respectively formed on the polycrystalline silicon layers 28a and 28b. COPYRIGHT: (C)2004,JPO&NCIPI
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