发明名称 MANUFACTURING METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a manufacturing method for semiconductor integrated circuit devices, which enables to test the semiconductor integrated circuit devices without the use of an expensive tester, thus reduces the total costs needed for the test. SOLUTION: According to the manufacturing method, a plurality of semiconductor chips having desired functions are formed on a semiconductor wafer. On a probing board having the size corresponding to the wafer, conductive needles are formed in the arrangement corresponding to that of the electrode pads of the semiconductor chips, and a test circuit, which is connected to the needles and operates according to a program to test the semiconductor chips, is mounted on the probing board. The probing board is superimposed on the wafer so that the needles touch the corresponding electrode pads of the semiconductor chips, and the semiconductor chips are tested with the test circuit, then a semiconductor chip judged to be nondefective is selected as a product. COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP2004260188(A) 申请公布日期 2004.09.16
申请号 JP20040053271 申请日期 2004.02.27
申请人 RENESAS TECHNOLOGY CORP 发明人 SHIMIZU ISAO;SATO MASAYUKI;FUKIAGE HIROSHI
分类号 G01R31/26;G01R31/28;G06F17/50;H01L21/66;(IPC1-7):H01L21/66 主分类号 G01R31/26
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