| 摘要 |
A phase locked loop circuit, for providing an oscillating output signal at an output frequency, comprising: a reference counter; a loop counter; a phase detector having a first input coupled to the reference counter and second input coupled to the loop counter; a voltage controlled oscillator having an input coupled to the output of the phase detector and an output for providing the oscillating output signal; a feedback loop coupling the output of the voltage controlled oscillator to the input of the loop counter; and delay circuitry, including a feedback loop, arranged to introduce a discrete delay into the output of the loop counter and/or the reference counter. |
