| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a wiring structure of a semiconductor device and a creating method of a wiring layout wherein its voltage drop is so suppressed as to be able to deal with the increase of the supplying amount of its power supply and improve the quality of its wiring without thickening the ground wirings of the power supplies of the layers other than its uppermost layer and without increasing the numbers of its wirings and its wiring layers. <P>SOLUTION: The semiconductor device having wiring layers not less than n-layers (n≥3) is so constituted as to partition it into first and second regions. In the first region, there are provided the ground wirings of a first power supply wherein the chip peripheral portions of an nth layer are connected respectively with the ground wiring of the power supplies of the layers not later than an (n-1)th layer. In the second region, a plurality of pads are provided. Further, in the nth layer of the second region, there are provided the ground wiring of the second power supply which are connected with the respective ground wiring of the first power supply, and are so formed as to pass them through the clearances adjoining to the pads, and further, are connected with the respective ground wiring of the power supplies of the layers not later than the (n-1)th layer. <P>COPYRIGHT: (C)2004,JPO&NCIPI |
