PLL FREQUENCY SYNTHESIZER AND SELECTION METHOD FOR ITS OSCILLATION FREQUENCY

摘要

PROBLEM TO BE SOLVED: To provide a PLL frequency synthesizer capable of realizing high-speed lock-up while maintaining high frequency comparison accuracy and an automatic selection method for its oscillation frequency.

SOLUTION: A VCO selector 20 generates/outputs a selection signal VCOSEL for selecting any one of voltage controlled oscillators VCO0 to VCOm-1 for generating respectively different oscillation frequency. In the VCO selector 20, a counter 21 counts up the number of pulses of a frequency division signal fn of an output signal fvco existing in a counting period set on the basis of the frequency division signal fr of a reference signal fref and an arithmetic circuit 22 compares the number of pulses obtained by the counter 21 with the number of pulses corresponding to required oscillation frequency and generates the selection signal VCOSEL on the basis of the comparison result.

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