| 发明名称 |
Instruction architecture using two instruction stacks |
| 摘要 |
Systems, methods, and devices are provided for instruction architecture. One embodiment includes a first integrated circuit (IC). The first IC includes at least two instruction stacks and an arbiter coupled to the at least two instruction stacks. A second IC is provided. The first and the second ICs are coupled using a serial interface.
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| 申请公布号 |
US2004179048(A1) |
申请公布日期 |
2004.09.16 |
| 申请号 |
US20030385838 |
申请日期 |
2003.03.11 |
| 申请人 |
SMITH GLENN M.;CLARK WALTER D.;EATON WILLIAM S. |
发明人 |
SMITH GLENN M.;CLARK WALTER D.;EATON WILLIAM S. |
| 分类号 |
G06F9/34;B41J2/045;(IPC1-7):B41J29/38 |
主分类号 |
G06F9/34 |
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