发明名称 Bonded substrate for an integrated circuit containing a planar intrinsic gettering zone
摘要 A bonded semiconductor-on-insulator substrate for an integrated circuit. The bonded semiconductor-on-insulator substrate includes a wafer, a handle wafer and an insulating bond layer. The wafer has a first layer of monocrystalline semiconductor material adjacent a first surface of the wafer. The wafer also has a second layer of undamaged by implantation monocrystalline semiconductor material adjacent a second surface of the wafer. The wafer further has a substantially planar intrinsic gettering zone of substantially pure semiconductor material and active gettering sites positioned between the first and second layers formed by implanting ions of the semiconductor material through the first layer of monocrystalline semiconductor material. The insulating bond layer bonds the handle wafer to the first surface of the wafer.
申请公布号 US2004180512(A1) 申请公布日期 2004.09.16
申请号 US20040811617 申请日期 2004.03.29
申请人 INTERSIL AMERICAS INC. 发明人 LINN JACK H.;SPEECE WILLIAM H.;SHLEPR MICHAEL G.;ROUSE GEORGE V.
分类号 H01L29/73;H01L21/02;H01L21/20;H01L21/265;H01L21/322;H01L21/331;H01L21/762;H01L27/12;(IPC1-7):H01L21/30;H01L21/46;H01L21/425 主分类号 H01L29/73
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