| 摘要 |
The invention includes a TFT-based logic circuit construction. Such construction includes a pair of first transistor devices, and a pair of second transistor devices over the first transistor devices. The first transistor devices have first active regions extending into a first semiconductive material, and the second transistor devices have second active regions extending into a second semiconductive material. At least one of the first and second semiconductive materials can comprise crystalline Si/Ge. The logic construction can comprise NOR circuitry and/or NAND circuitry, as well as higher level logic cells, such as latches. Further, the logic circuit construction can be associated with a semiconductor-on-insulator structure, and on versatile substrates. The invention includes three-dimensional logic cell layout configurations for enhanced wireability and logic cell density, which can lead to enhanced performance.
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