Topology for providing clock signals to multiple circuit units on a circuit module

摘要

A circuit module has a circuit board (50a), multiple circuit units (20a to 52i) on the circuit board (50a) and at least one clock input (12a) on the circuit board (50a) for receiving an external clock signal. The circuit module has a first PLL unit (60) on the circuit board (50a) for providing an internal clock signal based on the external clock signal to at least a first one of the circuit units. In addition, the circuit module has a second PLL unit (62) on the circuit board (50a) for providing an internal clock signal based on the external clock signal to at least a second one of the circuit units.