| 摘要 |
<p>An ultra high-speed clocked analog latch is revealed for use at clock speeds from 100 MHz to several GHz. The analog latch is used as a latching comparator for comparing a time-varying analog signal with an analog reference voltage. The latch uses CMOS manufacturing technology and a minimal amount of space for a two-stage amplifying and signal-generating device. The latch is useful in analog to digital converters (ADCs) in which high speed and high reliability are required, but only a small amount of space is available. The device is so small and economical that several may be used in series to avoid any meta-stability problems in high-speed read/write operations.</p> |
