发明名称 |
A METHOD OF IMPROVING SURFACE PLANARITY PRIOR TO MRAM BIT MATERIAL DEPOSITION |
摘要 |
<p>The present invention provides a method of fabricating a portion of a memory cell, the method comprising providing a first conductor in a trench which is provided in an insulating layer and flattening an upper surface of the insulating layer and the first conductor, forming a material layer over the flattened upper surface of the insulating layer and the first conductor and flattening an upper portion of the material layer while leaving intact a lower portion of the material layer over the insulating layer and the first conductor.</p> |
申请公布号 |
EP1456873(A1) |
申请公布日期 |
2004.09.15 |
申请号 |
EP20020795903 |
申请日期 |
2002.12.18 |
申请人 |
MICRON TECHNOLOGY, INC. |
发明人 |
YATES, DONALD, L.;DREWES, JOEL, A. |
分类号 |
H01L21/302;H01L21/3205;G11C5/02;G11C11/00;G11C11/02;G11C11/15;H01L21/203;H01L21/768;H01L21/8246;H01L27/105;H01L27/22;H01L43/08;(IPC1-7):H01L21/302 |
主分类号 |
H01L21/302 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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