发明名称 High speed interconnect circuit test method and apparatus
摘要 A Propagation Test instruction, a Decay Test instruction and a Cycle Test instruction provide testing of DC and AC interconnect circuits between circuits including JTAG boundary scan cells. A few additions to the Test Access Port circuitry and the boundary scan cells are required to implement the additional instructions. The instructions are extensions of the conventional JTAG operating structure. <IMAGE>
申请公布号 EP1335210(A3) 申请公布日期 2004.09.15
申请号 EP20030100257 申请日期 2003.02.07
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 WHETSEL, LEE D.
分类号 G01R31/28;G01R31/3185;G06F11/22;(IPC1-7):G01R31/318 主分类号 G01R31/28
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