| 摘要 |
PURPOSE: A method for fabricating a NAND flash memory device is provided to increase a punch-through voltage and reduce an off-leakage current by obtaining a desired threshold voltage by only one masking process for targeting the threshold voltage of a channel region of a select transistor. CONSTITUTION: Cell transistor threshold voltage ion implantation regions(22) are formed in a cell transistor region and a select transistor region of a semiconductor substrate(21). A plurality of gates(25C) of cell transistors and a plurality of gates(25S) of select transistors are formed. Photoresist is formed on the resultant structure. The photoresist in the cell transistor region and the select transistor region is exposed by using a cell source/drain mask. The exposed photoresist is developed wherein a predetermined thickness of the photoresist is left between the gates of the cell transistors. A halo ion implantation process is slantingly performed on a side of the gate of the select transistor to form a halo ion implantation region(24L,24R) under the gate of the select transistor. The photoresist left between the gates of the cell transistors are eliminated by a descum process. After a source/drain junction part(26) is formed by a cell source/drain ion implantation process, a photoresist strip process is performed.
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