| 摘要 |
Disclosed is a semiconductor device in which the capacitive element of MIMC structure has a low parasitic capacity. A process for fabrication of said semiconductor device. The semiconductor device has a capacitive element of MIMC structure, a PN photodiode, and a vertical NPN bipolar transistor which are mounted together on the same semiconductor substrate. The lower wiring layer connected to the TiN lower electrode layer of the capacitive element of MIMC structure is formed on the insulating film and the first interlayer insulating film. Between this insulating film and the p-type semiconductor substrate is the p<->-type low-concentration semiconductor layer whose impurity concentration is lower than that of the p-type semiconductor substrate. This construction suppresses the parasitic capacity of the capacitive element of the MIMC structure. Thus, it is possible to realize a multi-functional high-performance integrated circuit in which the capacitive element of MIMC structure with a low parasitic capacity, the photodiode, and the bipolar transistor are mounted together on the same semiconductor substrate.
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