发明名称 Frequency control/phase synchronizing circuit
摘要 The present invention has an object to perform phase synchronization pull-in at high speed and with good stability.A predetermined frequency band of a reproduced signal is emphasized by a waveform equalization means 1. Its output signal is sampled by an A/D converter 2 using a reproduction clock. Low-band noises of a sampled signal are suppressed by a low-band noise suppression means 3. Then, cycle information is detected from a specific pattern length or pattern interval using a cycle detection means with high precision and high efficiency. The obtained cycle information is converted into a frequency error by a frequency error detector 9. On the other hand, a phase error is detected by a phase error detector 10 from the output of the low-band noise suppression means 3. The frequency error and the phase error are passed through loop filters and thereafter added, whereby an oscillator 15 which generates a reproduction clock is controlled.
申请公布号 US6792063(B1) 申请公布日期 2004.09.14
申请号 US20000601796 申请日期 2000.09.22
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 OGURA YOUICHI
分类号 G11B20/10;G11B20/14;G11B27/30;H03L7/087;H03L7/113;(IPC1-7):H03D3/24 主分类号 G11B20/10
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