| 摘要 |
A method and circuit for mitigating gate leakage during a sleep state. An input pattern may be applied to one or more of a plurality of devices in a circuit, e.g., static circuit, dynamic circuit, during a sleep state. In response to the application of the input pattern, a majority of the devices in the circuit may have a substantially identical voltage at each of its terminals, i.e., the source, gate and drain terminal, thereby mitigating gate leakage.
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