| 摘要 |
A method of forming a test pattern includes: forming first and second junction regions having a symmetrical structure on both side of field oxide layer formed on a semiconductor substrate; forming third and fourth junction regions having a asymmetrical structure on front and rear portions of the field oxide layer; forming a test pattern having first and second projection portions on the semiconductor substrate, in which both side portions of the test pattern are overlapped with the first and second junction regions and the first and second projection portions which are formed on front and rear portions of the test pattern are overlapped with the third and fourth junction regions; forming an inter insulating layer on a resulting structure after forming the test pattern; patterning the inter insulating layer to expose a portion of the first to fourth junction regions; forming current supply lines connected to the first and second junction regions, respectively; and forming voltage measuring lines connected to the third and fourth junction regions, respectively.
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