发明名称 |
DRAM power-source controller that reduces current consumption during standby |
摘要 |
A power-source controller for reducing current consumption while a DRAM is in standby, includes a mode detection circuit inverting a disable signal having an L-level under the enable state and having an H-level under the disable state; an internal-power-source driver circuit having first and second transistors; and an internal-power-source reference circuit setting first and second driver control signals respectively to L-level and H-level when an L-level disable signal is input to turn on the first transistor and turn off the second transistor, supplying an external-power-source voltage as an internal-power-source voltage, setting the first driver control signal to H-level when an H-level disable signal is input, controlling the level of the second driver control signal to turn off the second transistor and control the first transistor, and supplying an internal power-source voltage lower than the external-power-source voltage.
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申请公布号 |
US6791894(B2) |
申请公布日期 |
2004.09.14 |
申请号 |
US20020252102 |
申请日期 |
2002.09.23 |
申请人 |
OKI ELECTRIC INDUSTRY CO., LTD. |
发明人 |
NAGAI WATARU;HIROTA AKIHIRO;SUYAMA JUNICHI |
分类号 |
G11C11/407;G11C7/22;G11C11/4074;(IPC1-7):G11C7/00 |
主分类号 |
G11C11/407 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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