| 摘要 |
A signal level shift circuit is provided for different circuit systems operating based on different supply voltages (VDDL, VDDH), wherein a supply voltage detection circuit detects a reduction of a first supply voltage (VDDL) regarding an input signal (IN). A level shift circuit comprises a load circuit portion consisting of PMOS transistors and a drive circuit portion consisting of NMOS transistors, all of which are connected together to form current paths. A switch circuit arranged for the current paths opens when a reduction is detected in the first supply voltage so that both the NMOS transistors are turned on. Thus, it is possible to effectively avoid occurrence of through currents flowing in the level shift circuit. The level shift circuit is followed by a flip-flop, which provides an output signal (OUT) in conformity with a second supply voltage (VDDH).
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